(China (Mainland))
Product Summary
The 21150-AB is a PCI-to-PCI Bridge. It is fully compliant with PCI Local Bus Specification, Revision 2.1. The device provides full support for delayed transactions, which enables the buffering of memory read, I/O, and configuration transactions. The 21150-AB has separate posted write, read data, and delayed transaction queues with significantly more buffering capability than first-generation bridges. In addition, the 21150-AB supports buffering of simultaneous multiple posted write and delayed transactions in both directions. The 21150 has sufficient clock and arbitration pins to support nine PCI bus master devices directly on its secondary interface.
Parametrics
21150-AB absolute maximum ratings: (1)Junction temperature, Tj: 125℃; (2)Maximum voltage applied to signal pins: 5.5 V; (3)Supply voltage, Vcc: 3.9 V; (4)Maximum power, Pwc (33 MHz): 1.0 W @ 33 MHz; (5)Maximum power, Pwc (66 MHz): 1.6 W @ 66MHz; (6)Storage temperature range, Tstg: –55℃ to +125℃.
Features
21150-AB features: (1)Implements delayed transactions for all PCI configuration, I/O, and memory read commands—up to three transactions simultaneously in each direction; (2)Allows 88 bytes of buffering (data and address) for posted memory write commands in each direction—up to five posted write transactions simultaneously in each direction; (3)Allows 72 bytes of read data buffering in each direction; (4)Provides concurrent primary and secondary bus operation, to isolate traffic; (5)Includes downstream lock support; (6)Supports both 5-V and 3.3-V signaling environments; (7)Available in both 33 MHz and 66 MHz versions; (8)Provides an IEEE standard 1149.1 JTAG interface.
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